Rtl Design Manager / Project Lead

GOLDMEN STACKS | THÀNH PHỐ HỒ CHÍ MINH

Job Description:

Experience with on-chip bus protocols (AXI, AXI-Lite etc.). Implement design/test-bench in System Verilog. Integrate IP blocks into larger SoC environment.

We are offering an entry-level position in a work environment that values ​​learning and development. If you are dedicated and proactive, come join us.

Application Request